processor array
英 [ˈprəʊsesə(r) əˈreɪ]
美 [ˈprɑːsesər əˈreɪ]
网络 处理单元阵列; 处理器阵列
双语例句
- The snippet processor reads table data from the disk array into memory.
snippet处理器将表数据从硬盘阵列读取到内存中。 - The processor can quickly determine the direction of the signal: because the radio waves reach both antennas at the same time, they must be coming from a direction perpendicular to the array.
处理器可以很快决定出讯号的方向，因为无线电波同时抵达两个天线，所以必然来自与阵列垂直的方向。 - For large scientific and engineering problem, an array processor might relieve the main processor of the time-consuming chore of array manipulation.
对一些庞大的科学和工程问题，一个阵列处理器可以把主处理器从耗费时间的向量处理的杂务中解脱出来； - A magnetic processor constitutes an array of logic gates, each of them programmable individually by the software.
磁处理器由逻辑闸阵列所组成，其中每个闸都可以由软体独立编程。 - Architecture of Processor Array for Motion Estimation with Efficient Cache Scheme
具有高效缓冲策略的运动估计阵列处理器结构 - A constant time sorting processor array architecture with a reconfigurable bus system
一个带有可变结构总线的常数排序处理机阵列 - A ping-pong memory was designed as the cache for the transfers between the host and the processor array, and four UART serial ports were extended.
设计了乒乓存储体用作主机和处理器阵列数据传输的缓冲区。另外还扩展出了4个UART串口。 - In this paper, the principle of Insert Merging Algorithm is introduced, and the realizing process of VLSI array processor is expatiated by demonstrating the way of getting the algorithm's systolic array.
介绍了插入归算法的原理。并通过该算法的脉动阵列实现，阐述了超大规模集成电路阵列处理器的实现过程。 - A parallel algorithm for computing MCST on the linear processor array
在线性处理机阵列上求MCST的并行算法 - With the guidance of low level signal detection theory, this subject has developed a low level signal detection platform based on high speed DSP processor, which can realize the reliable detection of the μ-volt level even lower level array induction signal.
本课题以微弱信号检测理论方法为指导，研制基于高速DSP处理器的微弱信号检测平台，可实现μ伏级甚至幅值更低的阵列感应微弱信号的可靠检测。 - Depending on above auto-focus theories, design an auto-focus system, analyze its performance and present the design of hardware and software particularly, the system is constructed by high speed DSP ( Digital Signal Processor) and FPGA ( Field Programmable Gate Array).
在自动调焦理论的基础上提出了自动调焦系统的设计，分析了系统的总体性能并作为软硬件设计的依据，调焦系统采用DSP+FPGA的高速硬件系统方案。 - The models successfully map 2-order IIR filtering algorithm on processor array with 4 processing elements. During the process, a linear and nonlinear programming software-LINGO is used to solve the model.
对IIR滤波算法在4个PE的处理器阵列上的映射建立了模型，并使用LINGO规划软件进行了模型求解。 - With the improvement in the performance of digital signal processor ( DSP) and field programmable gate array ( FPGA), more and more functions are implemented in the lower level of the control system.
随着数字信号处理器（DSP）、现场可编程逻辑门阵列（FPGA）性能的不断提高，运动控制系统的控制功能正在不断分散到控制系统的底层。 - SIMD Compiling Optimization for Real-life Multimedia Applications and Multimedia Extensions PROCESSOR ARRAY AND ITS APPLICATIONS TO NUMERICAL COMPUTATION AND DATABASE OPERATION
针对实际多媒体程序和多媒体扩展指令集的SIMD编译优化处理器阵列及其在数值运算与数据库运算中的运用 - The high speed data stream which is real time and not lose was stored into IDE interface disk. With the PIO mode, the process of reading and writing is controlled by DSP ( digital signal processor) and FPGA ( field programmable gate array).
利用FPGA和DSP控制IDE硬盘，采用PIO传输模式来对硬盘进行读写操作，从而实现对高速数据流的实时、无丢失的存储。 - The digital signal processor acts as navigation arithmetic processor, and Field Programmable Gate Array ( FPGA) as I/ O interface processor. These two processors cooperate efficiently and synchronously to meet the requirement of integrated navigation computer in speed, volume, power and so on.
以数字信号处理器DSP作导航解算处理器，以现场可编程门阵列FPGA作接口处理器，双机协同工作，速度快，同时满足了对组合导航计算机在速度、体积、功耗等诸方面的要求。 - The parallel storage processor includes four parts: parallel storage process arry, address transformation module, data parallel input module and output module. The parallel storage process array is the main body of parallel storage processor.
并行存储处理器包括并行存储处理阵列、地址变换模块、数据并行输入模块和输出模块四个功能部件，其中并行存储处理阵列是整个并行存储处理器的核心。 - Array processor can be divided into two types, square array and linear array based on processing element ( PE) array interconnection structure.
阵列处理器根据运算单元阵列的互连结构，主要分成方形阵列和线性阵列两种。 - Currently, using PC as the platform, digital signal processor ( DSP) and field programmable gate array ( FPGA) based motion control card is the mainstream of motion controller.
目前，以PC机为平台，以数字信号处理器（DSP）和现场可编程门阵列（FPGA）为控制核心的运动控制卡已成为运动控制器的发展主流。 - Similar to a classical processor, a programmable quantum processor consists of a fixed quantum gate array, a quantum system as data register and a quantum system as program register.
可程序化量子处理器，像经典处理器一样，由一组门序列和数据寄存器以及程序寄存器组成。 - Generally speaking, the video codec in portable system can be realized by two ways: Pure software way of DSP ( digital signal processor) and pure hardware way of ASIC or FPGA ( programmable logic gate array).
一般来说视频编解码器在便携式系统上的实现有以下两种方式：纯软件的DSP（数字信号处理）方式、纯硬件的ASIC（专用集成芯片）或者FPGA（可编程逻辑门阵列）。 - Antenna as an energy converter and spatial signal processor is an extremely important and necessary subsystem of radar, and array antenna technology is a critical technology of spatial signal processing.
天线作为空间能量转换器和空域信号处理器是雷达必不可少的重要分系统之一，阵列天线技术是空间域信号处理的关键技术。 - Through DDR controller the communications among internal memory, digital signal processor ( DSP) and Field programmable gate array ( FPGA), can be achieved. At the same time data can be stored with higher speed and bigger capacity during the process of collecting digital images.
通过该DDR控制器来实现内存储器与数字信号微处理器（DSP）、现场可编程门阵列（FPGA）等之间的通信和在数字图像采集处理过程中对数据的高速大容量存储。 - Such as overall system structure design, basic processor design, recurring matrix inversion processor array design, output prediction processor array design, control increment calculation, parameter identification, and so on.
包括系统的总体结构设计，基本的处理器单元的设计，递推求逆算法的处理器阵列设计，输出预测的处理器阵列设计，控制增量的计算，参数辨识等。